The present invention relates to electronic devices. In particular, it relates to SOI FET devices with body thicknesses in the few nanometers range.
As FET (Field-Effect-Transistor) devices are being scaled down, the technology becomes more complex, and changes in device structures and new fabrication methods are needed to maintain the expected performance improvements from one successive device generation to the next. It is particular interest to make low resistivity ohmic contact to devices in the below 25 nm gate length range.